Microelectronic devices, micromechanical devices, and other devices with microfeatures are typically formed by constructing several layers of components on a workpiece. In the case of microelectronic devices, a plurality of dies are fabricated on a single workpiece, and each die generally includes an integrated circuit and a plurality of bond-pads coupled to the integrated circuit. The dies are separated from each other and packaged to form individual microelectronic devices that can be attached to modules or installed in other products.
One aspect of fabricating and packaging such dies is forming interconnects that electrically couple conductive components located in different layers. In some applications, it may be desirable to form interconnects that extend completely through the dies or through a significant portion of the dies. Such interconnects electrically couple bond-pads or other conductive elements proximate to one side of the dies to conductive elements proximate to the other side of the dies. Through-wafer interconnects, for example, are constructed by forming deep vias on the front side and/or backside of the workpiece and in alignment with corresponding bond-pads at the front side of the workpiece. The vias are often blind vias in that they are closed at one end. The blind vias are then filled with a conductive fill material. After further processing, the workpiece is thinned to reduce the thickness of the final dies. Solder balls or other external electrical contacts are subsequently attached to the through-wafer interconnects at the backside and/or the front side of the workpiece. The solder balls or external contacts can be attached either before or after singulating the dies from the workpiece.
One concern of forming through-wafer interconnects is that conventional processes are susceptible to shorting. For example, FIGS. 1A-1C illustrate a conventional process of forming a through-wafer interconnect. FIG. 1A is a schematic side cross-sectional view of a workpiece 100 including a substrate 112, a terminal 122 on the substrate 112, and a hole 145 extending through the terminal 122 and into the substrate 112. After forming the hole 145, a dielectric layer 134 is deposited across the workpiece 100 and into the hole 145 to insulate the substrate 112 from the conductive material of the interconnect. FIG. 1B illustrates the workpiece 100 after removing a portion of the dielectric layer 134 with a spacer etching process. This process sometimes exposes a section 115 of an upper surface 114 on the substrate 112. FIG. 1C illustrates the workpiece 100 after forming a conductive interconnect 182 in the hole 145 with the interconnect 182 contacting the terminal 122. If the substrate 112 includes an exposed section 115, the interconnect 182 may also contact the substrate 112 and create a short between the terminal 122 and the substrate 112. Therefore, there is a need to improve the process of forming interconnects in workpieces.